Chip Economics

01 Four Lenses on One Rate

Neocloud (T2) guaranteed on-demand, all regions, generations on age (x, years) against each lens (y, from zero). Spread = (max − min) ÷ mean across the five generations. Example prints · 2026-08-15 · rates from the 2026-08-12 snapshot. Headline stat per published rule (mean where n ≥ 10, else median). The compute lens is denominated in petaFLOPs (PFLOP, 10^15 floating-point operations per second), dense, in the BF16 number format.

One observed number underlies every panel: the Neocloud guaranteed on-demand rate, in dollars per GPU-hour. Each panel divides that rate by one spec-sheet denominator. Two of the four compress the cross-section by roughly two thirds and two do not, which is the whole content of the page: power and memory bandwidth are the dimensions this market prices, capacity and compute are not. The two constrained inputs of the build-out are also the two the price tracks.

CRI-T2-{chip}-SXM-GTD-OD-ALL-{GB|BW|PF|KW} · derived Compute Rate Index (CRI) series carry the underlying citable cell in the first seven segments; strip the lens suffix to reach the parent. $/GB-hr computed from registry high-bandwidth memory (HBM) capacity (80 / 80 / 141 / 180 / 288 GB).

02 The Bandwidth Band

Re-denominated per unit of memory bandwidth, datacenter silicon from eight months to 5.7 years of age rents inside $0.800–1.161 per TB/s-hour, a 37% spread around a $0.984 mean. Raw, the same five generations span 3.8×. The band is the test, and this page set it at first print: a widening spread is the falsifiable marker firing. It has widened, from 20% on 2026-07-01 to 37% on 2026-08-12. The record is plotted below. Members are disclosed on every exhibit.

The compression is a like-for-like property. It holds across cells that share an operator segment, interruptibility grade, term, and region: the series named under each exhibit. Pooled cuts, marketplace minimums, or mixed interruptibility grades will not reproduce it: grade and tenor are different markets per unit of bandwidth, as everywhere else on this site.

Bandwidth does not hold this position alone, and on the current record it does not hold it at all. Power sits at 21%. Across the 46 days recorded, power is the tightest of the four lenses on 31 days and bandwidth on 15; capacity and compute are never within reach of either. The two that compress are the two inputs the build-out is short of.

CRB-T2-BW-ALL-OD-ALL · band row fields: band_min · band_max · band_mean · band_spread_pct · n_chips · member_chips. Emission gate n_chips ≥ 3, all members publication-qualified. Research-grade at launch (Shadow → Provisional).

03 Watt-Rent by Shell Class

Per unit of nameplate power, the panel sorts by shell class rather than by age. Here the dispersion is the finding. Consumer silicon with no datacenter bundle rents near $1 per kW-hr. Air-cooled datacenter silicon is flat at $4.50–4.66 across five years of age (A100 = H100 = L40S per watt). Liquid-class silicon rents at $6–7. Watt-rent prices the shell a chip can occupy.

CRB-T2-KW-AIR-OD-US · CRB-T2-KW-LIQ-OD-US · cohort = cooling_class (air | liquid); consumer prints are Marketplace-segment context, not band members.

04 Economic Life — the Breakeven Altimeter

Watt-rent and cash operating cost are the same unit. A chip exits economic life when its watt-rent decays to the cash boundary beneath it. One log-scale strip therefore reads as an altimeter: today's rent bands above, the cash operating boundary below, and the gap between them is distance to shutdown. Air-cooled silicon today covers its cash operating cost ≈5–7×. The consumer band near $1 is the visible preview of late life, close above the boundary.

The honest gap. The −26% per year slope is a cross-generation reading: the pace of the bandwidth frontier across five generations on one date. It is not the band's own decay through time, which is the parameter the crossing needs. No one has that parameter, because the band has no published history. That is the argument for starting the series now: every month of publication shrinks the one unmeasured input. The band is also an observed equilibrium, not a law. In the 2023 shortage, frontier chips were posted far above any spec-sheet line. The flatness carries a date, which is the second argument for watching it.

05 Method & Caveats

Normalized values equal the published parent series value divided by the disclosed constant. The parent cell's pooling, stat, and gate decisions are inherited unchanged. Denominators are vendor nameplate constants from the silicon registry and are never restated. A correction is a changelog entry, not a series break. Normalized series adopt the trimmed-mean stat (T2, shadow phase) from first print.

Denominators are variant-level: H100 SXM 3.35 TB/s and H100 PCIe 2.0 TB/s are different denominators. A chip without a disclosed denominator emits no row for that lens — no imputation.

Blind spots.

• Denominators are nameplate constants. They capture none of a deployment's realized capacity, interconnect domain, or measured throughput.
• System draw exceeds chip TDP (≈1.8× for HGX-class servers). TDP is the disclosed lens constant, and delivered-power cost comparisons apply the system factor.
• PUE, facility cost, and any decay election are the reader's. CCIR publishes prices, not the elections.
• The cross-section is one date across generations, not a cohort through time. §04 states the consequence.
• All numerators are posted list asks, not transactions. Thin cells (n < 3) are indicative.

Full construction: /documents/methodology · underlying cells: /explorer · the dated study these lenses generalize: /research/gpu-age-curve.